x86/intel_rdt: Fix unchecked MSR access
authorReinette Chatre <reinette.chatre@intel.com>
Sat, 15 Sep 2018 21:58:23 +0000 (14:58 -0700)
committerThomas Gleixner <tglx@linutronix.de>
Tue, 18 Sep 2018 21:38:06 +0000 (23:38 +0200)
commit70479c012b67b89e219c40eddc5dc338b7c447a3
treea3fa0666a409cfb6dcac5ef9bcaea7cf3c10cef2
parent47d53b184aee983ab9492503da11b0a81b19145b
x86/intel_rdt: Fix unchecked MSR access

When a new resource group is created, it is initialized with sane
defaults that currently assume the resource being initialized is a CAT
resource. This code path is also followed by a MBA resource that is not
allocated the same as a CAT resource and as a result we encounter the
following unchecked MSR access error:

unchecked MSR access error: WRMSR to 0xd51 (tried to write 0x0000
000000000064) at rIP: 0xffffffffae059994 (native_write_msr+0x4/0x20)
Call Trace:
mba_wrmsr+0x41/0x80
update_domains+0x125/0x130
rdtgroup_mkdir+0x270/0x500

Fix the above by ensuring the initial allocation is only attempted on a
CAT resource.

Fixes: 95f0b77ef ("x86/intel_rdt: Initialize new resource group with sane defaults")
Signed-off-by: Reinette Chatre <reinette.chatre@intel.com>
Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: "H Peter Anvin" <hpa@zytor.com>
Cc: "Tony Luck" <tony.luck@intel.com>
Cc: "Xiaochen Shen" <xiaochen.shen@intel.com>
Cc: "Chen Yu" <yu.c.chen@intel.com>
Link: https://lkml.kernel.org/r/1537048707-76280-6-git-send-email-fenghua.yu@intel.com
arch/x86/kernel/cpu/intel_rdt_rdtgroup.c