drm/i915: Zero out HOWM registers before writing new WM/HOWM register values
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Mon, 28 Nov 2016 17:37:14 +0000 (19:37 +0200)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Mon, 5 Dec 2016 14:23:27 +0000 (16:23 +0200)
commit6fe6a7ffd380d4a28c0086ec74751e9e738c01ed
tree4d4945a26f6feb86f6889f3ed980922c20fb8c62
parent11a85d6ab11440c87ff22bcdaa3b97dd5748ae14
drm/i915: Zero out HOWM registers before writing new WM/HOWM register values

On VLV/CHV some of the watermark values are split across two registers:
low order bits in one, and high order bits in another. So we may not be
able to update a single watermark value atomically, and thus we must be
careful that we don't temporarily introduce out of bounds values during
the reprogramming. To prevent this we can simply zero out all the high
order bits initially, then we update the low order bits, and finally
we update the high order bits with the final value.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1480354637-14209-13-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
drivers/gpu/drm/i915/intel_pm.c