ASoC: WM8804: Power down the PLL correctly
authorDimitris Papastamos <dp@opensource.wolfsonmicro.com>
Mon, 4 Oct 2010 08:37:48 +0000 (09:37 +0100)
committerMark Brown <broonie@opensource.wolfsonmicro.com>
Mon, 4 Oct 2010 15:03:11 +0000 (08:03 -0700)
commit6c20c807cf5a13f61193d39bb718f7a9b5df3813
tree7ff70ce5264cf5cd9efe9832742de406044a6ef7
parent86ce6c9a62c333157d3f2ef4e4dc1fe18b70eb63
ASoC: WM8804: Power down the PLL correctly

The PLL is disabled when the corresponding bit is set not the other
way around.  This commit depends on my other commit with Subject
"ASoC: WM8804: Refactor set_pll code to avoid GCC warnings".

Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
sound/soc/codecs/wm8804.c