drm/amd/display: fix pstate allow handling in dcn2
authorJun Lei <Jun.Lei@amd.com>
Thu, 16 May 2019 19:23:20 +0000 (15:23 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Sat, 22 Jun 2019 14:34:08 +0000 (09:34 -0500)
commit6ba117404e4121ddd043201706f9b4b8dc718036
tree6066de4d0e6563febde476b749f6b9de68a0ecda
parent5cb646d767bb3d1d85c9828afad505bb9ee1982a
drm/amd/display: fix pstate allow handling in dcn2

[why]
pstate allow/block is not being handled properly on DCN2

[how]
DML needs to be updated to calculate pstate support at both min and max
mpc combine rather than just min
clock manager needs to update current to new pstate support before
sending to pplib/smu

Signed-off-by: Jun Lei <Jun.Lei@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c
drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c