projects / openwrt / staging / blogic.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 34dc63a) | patch
m68k: Implement arch_dma_prep_coherent()
authorChristoph Hellwig <hch@lst.de>
Tue, 25 Jun 2019 09:01:35 +0000 (11:01 +0200)
committerGeert Uytterhoeven <geert@linux-m68k.org>
Mon, 1 Jul 2019 09:17:00 +0000 (11:17 +0200)
commit69878ef47562f32e02d0b7975c990e1c0339320d
tree8a33017b7cacf7905dc0c2a85c6b64d283c51610tree | snapshot
parent34dc63a5fb9b7f5dcb49f61552226c6314f347f6commit | diff
m68k: Implement arch_dma_prep_coherent()

When we remap memory as non-cached, to be used as a DMA coherent buffer,
we should writeback all cache and invalidate the cache lines so that we
make sure we have a clean slate.  Implement this using the cache_push()
helper.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
arch/m68k/Kconfig diff | blob | history
arch/m68k/kernel/dma.c diff | blob | history
John Crispins staging tree