Tegra186: read activity monitor's clock counter values
authorVarun Wadekar <vwadekar@nvidia.com>
Fri, 23 Sep 2016 21:28:16 +0000 (14:28 -0700)
committerVarun Wadekar <vwadekar@nvidia.com>
Fri, 7 Apr 2017 16:15:51 +0000 (09:15 -0700)
commit691bc22de951947bcc5d3bb637858fde7283781c
tree66beeeba3d7772d536498010cc41bf2b77c45734
parente698a822f06e40ba4f59abaf269bbd1379da57d7
Tegra186: read activity monitor's clock counter values

This patch adds a new SMC function ID to read the refclk and coreclk
clock counter values from the Activity Monitor. The non-secure world
requires this information to calculate the CPU's frequency.

Formula: "freq = (delta_coreclk / delta_refclk) * refclk_freq"

The following CPU registers have to be set by the non-secure driver
before issuing the SMC:

X1 = MPIDR of the target core
X2 = MIDR of the target core

Change-Id: I296d835def1f5788c17640c0c456b8f8f0e90824
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
plat/nvidia/tegra/include/t186/tegra_def.h
plat/nvidia/tegra/soc/t186/plat_setup.c
plat/nvidia/tegra/soc/t186/plat_sip_calls.c
plat/nvidia/tegra/soc/t186/platform_t186.mk