drm/amd/display: interface to check if timing can be seamless
authorAnthony Koo <Anthony.Koo@amd.com>
Sun, 20 Jan 2019 06:08:02 +0000 (01:08 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 6 Feb 2019 18:30:44 +0000 (13:30 -0500)
commit68f1a00c23d443c9d940fbd512a195e9e6c08b11
treedafcbc81858c8faa6c77d5c1c61beec8e620d551
parentc00800c46e832ca27f4db489b8c28a56603f8d2c
drm/amd/display: interface to check if timing can be seamless

[Why]
Need to figure out whether a timing we want to commit matches
something that GOP already programmed, in which case
we can decide to some optimizations

[How]
1. Add way to check for DIG FE
2. Add way to check for matching OTG timing
3. Add way to check for matching pixel clock (if possible)
    - Currently only support DP for pixel clock, since it is easy to calc

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/core/dc.c
drivers/gpu/drm/amd/display/dc/dc.h
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.h
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c
drivers/gpu/drm/amd/display/dc/inc/clock_source.h
drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h
drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h