Exynos542x: Add workaround for exynos iROM errata
authorAkshay Saraswat <akshay.s@samsung.com>
Fri, 20 Feb 2015 07:57:15 +0000 (13:27 +0530)
committerMinkyu Kang <mk7.kang@samsung.com>
Sat, 28 Feb 2015 09:03:46 +0000 (18:03 +0900)
commit67a0652c47ec568ea274f5ff0303c9bba8ceddbf
tree5e5324b6a3bf55684f0c2a8de4c129d95fb4c714
parenta389531439a7d5cea2829054edcf438dc76e79a9
Exynos542x: Add workaround for exynos iROM errata

iROM logic provides undesired jump address for CPU2.
This patch adds a programmable susbstitute for a part of
iROM logic which wakes up cores and provides jump addresses.
This patch creates a logic to make all secondary cores jump
to a particular address which evades the possibility of CPU2
jumping to wrong address and create undesired results.

Logic of the workaround:

Step-1: iROM code checks value at address 0x2020028.
Step-2: If value is 0xc9cfcfcf, it jumps to the address (0x202000+CPUid*4),
else, it continues executing normally.
Step-3: Primary core puts secondary cores in WFE and store 0xc9cfcfcf in
0x2020028 and jump address (pointer to function low_power_start)
in (0x202000+CPUid*4).
Step-4: When secondary cores recieve event signal they jump to this address
and continue execution.

Signed-off-by: Kimoon Kim <kimoon.kim@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
arch/arm/cpu/armv7/exynos/Makefile
arch/arm/cpu/armv7/exynos/lowlevel_init.c
arch/arm/cpu/armv7/exynos/sec_boot.S [new file with mode: 0644]