da850/omap-l138: modifications for Logic PD Rev.3 AM18xx EVM
authorRajashekhara, Sudhakar <sudhakar.raj@ti.com>
Sun, 24 Jun 2012 21:35:16 +0000 (21:35 +0000)
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>
Sat, 1 Sep 2012 12:58:09 +0000 (14:58 +0200)
commit6652c62e0146411ea2b38fb36336915ffdba99de
tree11c7ebefc8a41933304d4ada30cbb822e3874910
parentecc98ec18c5b23b399e4aa12d252b719ea4aedb1
da850/omap-l138: modifications for Logic PD Rev.3 AM18xx EVM

AHCLKR/UART1_RTS/GP0[11] pin needs to be configured for
MMC and NOR to work on DA850/OMAP-L138 Rev.3 EVM. When
GP0[11] is low, the SD0 interface will not work, but NOR
flash will. When GP0[11] is high, SD0 will work but NOR
flash will not.

Tested-by: Christian Riesch <christian.riesch@omicron.at>
Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com>
Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com>
Signed-off-by: Hadli, Manjunath <manjunath.hadli@ti.com>
board/davinci/da8xxevm/da850evm.c