MIPS: smp-cps: Stop printing EJTAG exceptions to UART
authorPaul Burton <paul.burton@imgtec.com>
Wed, 3 Feb 2016 03:15:35 +0000 (03:15 +0000)
committerRalf Baechle <ralf@linux-mips.org>
Fri, 13 May 2016 12:01:51 +0000 (14:01 +0200)
commit6609ccdc852f7bfbfa54300dd5b3cd89eb4ced6f
treee4340631d75a1fa95394648fc1a9bfc8b79757f4
parent6422a913856716be080dba4c2cb9d083d4e244ed
MIPS: smp-cps: Stop printing EJTAG exceptions to UART

When CONFIG_MIPS_CPS_NS16550 is enabled, some register state is dumped
to the UART when an exception is taken via the BEV on secondary cores.
EJTAG exceptions are architecturally expected to be handled by the BEV
even when Status.BEV is 0. This effectively means that if userland
executes an sdbbp instruction on a secondary core then the kernel dumps
register state to the UART even though the exception is perfectly normal
& expected. Prevent this by simply not dumping information to the UART
for EJTAG exceptions.

Fixes: 609cf6f2291a ("MIPS: CPS: Early debug using an ns16550-compatible UART")
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/12341/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/kernel/cps-vec.S