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(parent: 550db28) | patch
drm/amd/display: Add driver-side parsing for CM
authorJun Lei <Jun.Lei@amd.com>
Mon, 13 Aug 2018 19:11:44 +0000 (15:11 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 11 Sep 2018 03:42:32 +0000 (22:42 -0500)
commit61ea4c6f70ffd18eed7fc0d3fb678245f499c756
treea9cd18bf5c9f20944560a42cf0b1323b75f92d6btree | snapshot
parent550db288129591c4b2f669d724f12e43a380c286commit | diff
drm/amd/display: Add driver-side parsing for CM

Although 4 unique register values exist for gamma modes, two are
actually the same (the two RAMs) It’s not possible for caller to
understand this HW specific behavior, so some parsing is necessary
in driver

Signed-off-by: Jun Lei <Jun.Lei@amd.com>
Reviewed-by: Wesley Chalmers <Wesley.Chalmers@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c diff | blob | history
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