MIPS: Break down cacheops.h definitions
authorJames Hogan <james.hogan@imgtec.com>
Wed, 16 Dec 2015 23:49:36 +0000 (23:49 +0000)
committerRalf Baechle <ralf@linux-mips.org>
Sun, 24 Jan 2016 02:29:58 +0000 (03:29 +0100)
commit5fa393c8571953d6d428062c3572ec3ddbb1eec8
tree79070a54783f57a76ceb69289280900bc7590961
parent1b505defe051749150ae699483cfcde3191d9a76
MIPS: Break down cacheops.h definitions

Most of the cache op codes defined in cacheops.h are split into a 2-bit
cache identifier, and a 3-bit cache op code which does largely the same
thing semantically regardless of the cache identifier.

To allow the use of these definitions by KVM for decoding cache ops,
break the definitions down into parts where it makes sense to do so, and
add masks for the Cache and Op field within the cache op.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Gleb Natapov <gleb@kernel.org>
Cc: kvm@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/11892/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/include/asm/cacheops.h