drm/i915/dsc: Fix PPS register definition macros for 2nd VDSC engine
authorManasi Navare <manasi.d.navare@intel.com>
Fri, 24 Aug 2018 01:48:07 +0000 (18:48 -0700)
committerManasi Navare <manasi.d.navare@intel.com>
Tue, 28 Aug 2018 22:11:31 +0000 (15:11 -0700)
commit5df52391ddbed869c7d67b00fbb013bd64334115
tree01be988695af07b90e9927f460b178e0d9f3148a
parentb45649fbd5bf94199a84bdeb4515bca926f698a9
drm/i915/dsc: Fix PPS register definition macros for 2nd VDSC engine

This patch fixes the PPS4 and PPS5 register definition macros that were
resulting into an incorect MMIO address.

Fixes: 2efbb2f099fb ("i915/dp/dsc: Add DSC PPS register definitions")
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180824014807.14681-1-manasi.d.navare@intel.com
drivers/gpu/drm/i915/i915_reg.h