Add workaround for errata 1220197 for Cortex-A76
authorLouis Mayencourt <louis.mayencourt@arm.com>
Mon, 25 Feb 2019 11:37:38 +0000 (11:37 +0000)
committerLouis Mayencourt <louis.mayencourt@arm.com>
Tue, 26 Feb 2019 16:21:06 +0000 (16:21 +0000)
commit5cc8c7ba1b24ace2ef7345e96d933141f3609817
treef9ab8df5738d6245ca1b4e4fd7c5af143c223f2f
parent508d71108a06c7fce2eeef78659b9b7739cee6eb
Add workaround for errata 1220197 for Cortex-A76

Streaming store under specific conditions might cause deadlock or data
corruption. Set bit 25:24 of CPUECTLR_EL1, which disables write
streaming to the L2 to prevent this.

Change-Id: Ib5cabb997b35ada78b27e75787afd610ea606dcf
Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
docs/cpu-specific-build-macros.rst
include/lib/cpus/aarch64/cortex_a76.h
lib/cpus/aarch64/cortex_a76.S
lib/cpus/cpu-ops.mk