clk: meson: meson8b: fix meson8b_cpu_clk parent clock name
authorMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Mon, 23 Apr 2018 19:30:29 +0000 (21:30 +0200)
committerJerome Brunet <jbrunet@baylibre.com>
Wed, 25 Apr 2018 08:23:19 +0000 (10:23 +0200)
commit5b33139b1a08eabcba7b39d8a4babd7fc2d3b534
tree38052ef6d2b5de60bc63cf0f459bf1abb8633ec7
parentb251e4c88fb443b3a44c3d04268f70e2260f1f8a
clk: meson: meson8b: fix meson8b_cpu_clk parent clock name

meson8b_cpu_clk has two parent clocks:
- meson8b_xtal
- meson8b_cpu_scale_out_sel

The name of the "xtal" clock parent is specified correctly. However,
there is a typo in the name of the second parent clock. The
meson8b_cpu_scale_out_sel definition uses the name "cpu_scale_out_sel"
(which matches the name from the datasheet). However, the mux parent
definition uses the name "cpu_out_sel" which does not match any existing
clock.

Fixes: 251b6fd38bcb9c ("clk: meson: rework meson8b cpu clock")
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
drivers/clk/meson/meson8b.c