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rockchip: rk3399: Fix CAS latency setting
authorDerek Basehore <dbasehore@chromium.org>
Fri, 10 Feb 2017 06:02:42 +0000 (22:02 -0800)
committerXing Zheng <zhengxing@rock-chips.com>
Fri, 24 Feb 2017 12:07:45 +0000 (20:07 +0800)
commit5a5dc61713fd563a3bb8a89bd26729f4348bb5d6
tree9b65ed64df3530d3d33aca4274df3da604fb2d81tree | snapshot
parent43f52e92e45823c6967b20fb9e90dd6e3dc7275fcommit | diff
rockchip: rk3399: Fix CAS latency setting

The F1 CAS latency setting was not bit shifted, which resulted in
setting the DRAM additive latency value instead.

Signed-off-by: Derek Basehore <dbasehore@chromium.org>
plat/rockchip/rk3399/drivers/dram/dfs.c diff | blob | history
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