drm/i915: Flush extra hard after writing relocations through the GTT
authorChris Wilson <chris@chris-wilson.co.uk>
Tue, 30 Jul 2019 11:21:51 +0000 (12:21 +0100)
committerChris Wilson <chris@chris-wilson.co.uk>
Fri, 2 Aug 2019 07:38:45 +0000 (08:38 +0100)
commit576f05865581f82ac988ffec70e4e2ebd31165db
tree48c1c5940b49864a83e88cadcf6a9582986ddf6f
parent51fbd8de87dcf09f3929e5438e4344bea4338990
drm/i915: Flush extra hard after writing relocations through the GTT

Recently discovered in commit bdae33b8b82b ("drm/i915: Use maximum write
flush for pwrite_gtt") was that we needed to our full write barrier
before changing the GGTT PTE to ensure that our indirect writes through
the GTT landed before the PTE changed (and the writes end up in a
different page). That also applies to our GGTT relocation path.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: stable@vger.kernel.org
Reviewed-by: Prathap Kumar Valsan <prathap.kumar.valsan@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190730112151.5633-4-chris@chris-wilson.co.uk
drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c