ARM: 8561/4: dma-mapping: Fix the coherent case when iommu is used
authorGregory CLEMENT <gregory.clement@free-electrons.com>
Fri, 15 Apr 2016 10:20:13 +0000 (11:20 +0100)
committerRussell King <rmk+kernel@armlinux.org.uk>
Thu, 14 Jul 2016 15:25:31 +0000 (16:25 +0100)
commit565068221b90573d0a4ac3e73f1aa960f5571b84
tree13b110a9b9e2f0630d4126825374b630c980d6e6
parentf12708965069410691e47d1d216ec7ad1516bfd2
ARM: 8561/4: dma-mapping: Fix the coherent case when iommu is used

When doing dma allocation with IOMMU the __iommu_alloc_atomic() was
used even when the system was coherent. However, this function
allocates from a non-cacheable pool, which is fine when the device is
not cache coherent but won't work as expected in the device is cache
coherent. Indeed, the CPU and device must access the memory using the
same cacheability attributes.

Moreover when the devices are coherent, the mmap call must not change
the pg_prot flags in the vma struct. The arm_coherent_iommu_mmap_attrs
has been updated in the same way that it was done for the arm_dma_mmap
in commit 55af8a91640d ("ARM: 8387/1: arm/mm/dma-mapping.c: Add
arm_coherent_dma_mmap").

Suggested-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/mm/dma-mapping.c