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ASoC: Intel: bxtn: Disable interrupt when DSP is in D3
authorJeeja KP <jeeja.kp@intel.com>
Mon, 13 Mar 2017 16:41:25 +0000 (22:11 +0530)
committerMark Brown <broonie@kernel.org>
Wed, 15 Mar 2017 17:27:58 +0000 (17:27 +0000)
commit5518af9f97940e84de6a4bf6fed212a95278f818
treef87620833d5a1231a4d20468195816b238a2ad1btree | snapshot
parent3b563e0a8406bf47cd39ca59f8453b3d968d996acommit | diff
ASoC: Intel: bxtn: Disable interrupt when DSP is in D3

When DSP is in D3, no interrupts are expected, so disable
interrupt while entering D3.

Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/intel/skylake/bxt-sst.c diff | blob | history
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