drm/i915: allow high-bpc modes on DP
authorDaniel Vetter <daniel.vetter@ffwll.ch>
Fri, 19 Apr 2013 09:24:38 +0000 (11:24 +0200)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Mon, 29 Apr 2013 19:51:13 +0000 (21:51 +0200)
commit52541e30339d932382ab9c0c1d1bacc8dacc541e
tree248ed1a809d2151274dc9e89e845eaca0e231607
parentff9ce46ed6878d6be08660f7d75897d500a4fe9e
drm/i915: allow high-bpc modes on DP

Totally untested due to lack of screens supporting more than 8bpc. But
now we should have closed all holes in our bpp handling, so this
should be safe. The last missing piece was 10bpc support for g4x/vlv,
since we directly use the pipe bpp to feed the display link (and
anyway, only the cpt has any means to have a pipe bpp != the display
link bpp).

Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_dp.c