drm/i915/preempt: Default to disabled mid-command preemption levels
authorMichał Winiarski <michal.winiarski@intel.com>
Tue, 3 Oct 2017 20:34:46 +0000 (21:34 +0100)
committerChris Wilson <chris@chris-wilson.co.uk>
Wed, 4 Oct 2017 16:52:45 +0000 (17:52 +0100)
commit5152defe4a53ad15e6d96c422440152302c8abd7
tree4682f18a5f68d054f0e1028c65185fec41bafc12
parent1e998343f95b46497c56a21de1b14a302256f973
drm/i915/preempt: Default to disabled mid-command preemption levels

Supporting fine-granularity preemption levels may require changes in
userspace batch buffer programming. Therefore, we need to fallback to
safe default values, rather that use hardware defaults. Userspace is
still able to enable fine-granularity, since we're whitelisting the
register controlling it in WaEnablePreemptionGranularityControlByUMD.

v2: Extend w/a to cover Cannonlake
v3: Fix commentary to include both fake w/a names.

Signed-off-by: Michał Winiarski <michal.winiarski@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20171003203453.15692-2-chris@chris-wilson.co.uk
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_engine_cs.c