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clk: sifive: Add clock driver for GEMGXL MGMT
authorBin Meng <bmeng.cn@gmail.com>
Wed, 22 May 2019 07:09:44 +0000 (00:09 -0700)
committerJoe Hershberger <joe.hershberger@ni.com>
Sat, 1 Jun 2019 18:33:17 +0000 (13:33 -0500)
commit49191d259f433f8341a71ab6f821c1d89e2f5092
tree351793b9b2eaab40e8563d018ed53fe0c3d051adtree | snapshot
parent379af67ab3ba1a16e032c8d082fe85efa4bf21fecommit | diff
clk: sifive: Add clock driver for GEMGXL MGMT

This adds a clock driver to support the GEMGXL management IP block
found in FU540 SoCs to control GEM TX clock operation mode for
10/100/1000 Mbps.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Tested-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
drivers/clk/sifive/Kconfig diff | blob | history
drivers/clk/sifive/Makefile diff | blob | history
drivers/clk/sifive/gemgxl-mgmt.c [new file with mode: 0644] blob
Broadcom-s U-Boot