x86/split_lock: Bits in IA32_CORE_CAPABILITIES are not architectural
authorTony Luck <tony.luck@intel.com>
Thu, 16 Apr 2020 20:57:53 +0000 (13:57 -0700)
committerThomas Gleixner <tglx@linutronix.de>
Sat, 18 Apr 2020 10:48:44 +0000 (12:48 +0200)
commit48fd5b5ee714714f4cf9f9e1cba3b49b1fd40ed6
tree260b3fe5220a54a831f7bcf3d3dbf227897124e4
parent9fe0450785abbc04b0ed5d3cf61fcdb8ab656b4b
x86/split_lock: Bits in IA32_CORE_CAPABILITIES are not architectural

The Intel Software Developers' Manual erroneously listed bit 5 of the
IA32_CORE_CAPABILITIES register as an architectural feature. It is not.

Features enumerated by IA32_CORE_CAPABILITIES are model specific and
implementation details may vary in different cpu models. Thus it is only
safe to trust features after checking the CPU model.

Icelake client and server models are known to implement the split lock
detect feature even though they don't enumerate IA32_CORE_CAPABILITIES

[ tglx: Use switch() for readability and massage comments ]

Fixes: 6650cdd9a8cc ("x86/split_lock: Enable split lock detection by kernel")
Signed-off-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lkml.kernel.org/r/20200416205754.21177-3-tony.luck@intel.com
arch/x86/kernel/cpu/intel.c