clk: zx: Add audio div clock method for zx296702
authorJun Nie <jun.nie@linaro.org>
Thu, 23 Jul 2015 07:02:51 +0000 (15:02 +0800)
committerStephen Boyd <sboyd@codeaurora.org>
Tue, 28 Jul 2015 18:59:34 +0000 (11:59 -0700)
commit4599dd2c926915b5e8c27e0ca21a6172f9d6881c
tree311e7418c570e049d2abbd60bd720c9b7b537aa1
parent7764d0cdc3dbf15010f66e0e2e5786f0f03d402a
clk: zx: Add audio div clock method for zx296702

Add SPDIF/I2S divider clock method for zx296702

Signed-off-by: Jun Nie <jun.nie@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
drivers/clk/zte/Makefile
drivers/clk/zte/clk-pll.c [deleted file]
drivers/clk/zte/clk.c [new file with mode: 0644]
drivers/clk/zte/clk.h