rockchip: clk: rk3288: add ciu_clk entry for eMMC/SDMMC/SDIO
authorXu Ziyuan <xzy.xu@rock-chips.com>
Sun, 16 Apr 2017 09:44:45 +0000 (17:44 +0800)
committerSimon Glass <sjg@chromium.org>
Wed, 10 May 2017 19:37:21 +0000 (13:37 -0600)
commit45112271ef3d6e71fa99829a93c5d91a7dc26ca4
treea15ed5eb95cc2d7b5eb64889e5432d0bd0e46743
parent7a25a63c134f9fdc1e977ca7d6c8f1ddda6103e5
rockchip: clk: rk3288: add ciu_clk entry for eMMC/SDMMC/SDIO

The genunie bus clock is sclk_x for eMMC/SDMMC/SDIO, add support for
it.

Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
drivers/clk/rockchip/clk_rk3288.c