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ASoC: tlv320aic32x4: Use correct shift definition for DATATYPE bits
authorAndrew F. Davis <afd@ti.com>
Tue, 12 Dec 2017 22:43:05 +0000 (16:43 -0600)
committerMark Brown <broonie@kernel.org>
Wed, 13 Dec 2017 12:27:31 +0000 (12:27 +0000)
commit4483521d81684764cb7f2569bf3e4b10d38ef9f7
tree470d92c42596901a92de2a5f4192ba397fc73bactree | snapshot
parent7e2a4dc5c1f0875646816c527cad5943cb6d5cc7commit | diff
ASoC: tlv320aic32x4: Use correct shift definition for DATATYPE bits

Setting the DATATYPE bit field requires shifting our value by 6. Setting
the J value of the PLL also requires a shift by 6. Currently the code
abuses this fact and uses the shift for the PLL register to set the
data-type register. Fix this here by using the definition meant for
this register.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/codecs/tlv320aic32x4.c diff | blob | history
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