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OMAP5: ADD precalculated timings for ddr3
authorLokesh Vutla <lokeshvutla@ti.com>
Tue, 22 May 2012 00:03:24 +0000 (00:03 +0000)
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>
Sat, 7 Jul 2012 12:07:23 +0000 (14:07 +0200)
commit43037d76316db1a53be16a4c1ed97203257fa4ee
treec549887069235d35144830a8ec0bcf9346c1d1catree | snapshot
parenteb4e18e89eec8d63f064cb5ec597ba9387fe4987commit | diff
OMAP5: ADD precalculated timings for ddr3

Adding precalculated timings for ddr3 with 1cs
adding required registers for ddr3

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
arch/arm/cpu/armv7/omap4/sdram_elpida.c diff | blob | history
arch/arm/cpu/armv7/omap5/sdram.c diff | blob | history
arch/arm/include/asm/emif.h diff | blob | history
Broadcom-s U-Boot