perf intel-pt: Accumulate cycle count from TSC/TMA/MTC packets
authorAdrian Hunter <adrian.hunter@intel.com>
Mon, 20 May 2019 11:37:17 +0000 (14:37 +0300)
committerArnaldo Carvalho de Melo <acme@redhat.com>
Wed, 5 Jun 2019 12:47:56 +0000 (09:47 -0300)
commit3f05516758bef438cef7adc47599f8b8faad7c3a
treeca3a74178c5f8a0b33fc5efc21648fcb30112284
parentf3c98c4b5ac831f29b1cc19fa84d3c8401f846d6
perf intel-pt: Accumulate cycle count from TSC/TMA/MTC packets

When CYC packets are not available, it is still possible to count cycles
using TSC/TMA/MTC timestamps.

As the timestamp increments in TSC ticks, convert to CPU cycles using
the current core-to-bus ratio.

Do not accumulate cycles when control flow packet generation is not
enabled, nor when time has been "lost", typically due to mwait, which is
indicated by a TSC/TMA packet that is not part of PSB+.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Link: http://lkml.kernel.org/r/20190520113728.14389-12-adrian.hunter@intel.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
tools/perf/util/intel-pt-decoder/intel-pt-decoder.c