drm/i915: Introduce concept of per-timeline (context) HWSP
authorChris Wilson <chris@chris-wilson.co.uk>
Mon, 28 Jan 2019 18:18:07 +0000 (18:18 +0000)
committerChris Wilson <chris@chris-wilson.co.uk>
Mon, 28 Jan 2019 19:06:59 +0000 (19:06 +0000)
commit3adac4689f58cb3fb666d92dff0ee73cc97d24d7
tree90bc29f50d97398999529cfd070c7944ec89f9c1
parent1e345568e3b541e19202caadae8d2cb2237e7ed8
drm/i915: Introduce concept of per-timeline (context) HWSP

Supplement the per-engine HWSP with a per-timeline HWSP. That is a
per-request pointer through which we can check a local seqno,
abstracting away the presumption of a global seqno. In this first step,
we point each request back into the engine's HWSP so everything
continues to work with the global timeline.

v2: s/i915_request_hwsp/hwsp_seqno/ to emphasis that this is the current
HW value and that we are accessing it via i915_request merely as a
convenience.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190128181812.22804-1-chris@chris-wilson.co.uk
drivers/gpu/drm/i915/i915_request.c
drivers/gpu/drm/i915/i915_request.h
drivers/gpu/drm/i915/intel_lrc.c