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(parent: eb0ee8a) | patch
ice: write register with correct offset
authorMitch Williams <mitch.a.williams@intel.com>
Wed, 9 Oct 2019 14:09:48 +0000 (07:09 -0700)
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>
Thu, 7 Nov 2019 00:41:45 +0000 (16:41 -0800)
commit395594563b29fbcd8d9a4f0a642484e5d3bb6db1
treee1bc6c2e0658849b1edb4af514a0ce39ebd204fftree | snapshot
parenteb0ee8abfeb9ff4b98e8e40217b8667bfb08587acommit | diff
ice: write register with correct offset

The VF_MBX_ARQLEN register array is per-PF, not global, so we should not
use the absolute VF ID as an index. Instead, use the per-PF VF ID.

This fixes an issue with VFs on PFs other than 0 not seeing reset.

Signed-off-by: Mitch Williams <mitch.a.williams@intel.com>
Tested-by: Andrew Bowers <andrewx.bowers@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
drivers/net/ethernet/intel/ice/ice_virtchnl_pf.c diff | blob | history
John Crispins staging tree