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(parent: ca130c2) | patch
drm/nv04-nv10: Don't re-enable FIFO access multiple times after IRQ dispatch.
authorFrancisco Jerez <currojerez@riseup.net>
Sat, 20 Nov 2010 13:43:51 +0000 (14:43 +0100)
committerFrancisco Jerez <currojerez@riseup.net>
Wed, 8 Dec 2010 02:00:20 +0000 (03:00 +0100)
commit38cf189fa13e988f85efb6de26315e762cecc260
tree3f2572b44a4d2d56632fcc3f59e85dfc356acac1tree | snapshot
parentca130c2267d0719c92ed188e15082d6baad6c046commit | diff
drm/nv04-nv10: Don't re-enable FIFO access multiple times after IRQ dispatch.

nvxx_graph_isr is already taking care of it. In some cases this
could've made you miss PGRAPH interrupts (e.g. when you were supposed
to get several IRQs of the same kind in a row).

Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
drivers/gpu/drm/nouveau/nv04_graph.c diff | blob | history
drivers/gpu/drm/nouveau/nv10_graph.c diff | blob | history
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