Altera TSE: Work around unaligned DMA receive packet issue with Altera SGDMA
authorVince Bridgers <vbridger@altera.com>
Thu, 24 Apr 2014 21:58:08 +0000 (16:58 -0500)
committerDavid S. Miller <davem@davemloft.net>
Sat, 26 Apr 2014 16:26:26 +0000 (12:26 -0400)
commit37c0ffaad21401eacc6618a121cc2c501131026f
treed76882b5f858e65c591d3e10f82ef19167d045f6
parentc2163260ea5b6f453b8f940709e40e9cf33255d0
Altera TSE: Work around unaligned DMA receive packet issue with Altera SGDMA

This patch works around a recently discovered unaligned receive dma problem
with the Altera SGMDA. The Altera SGDMA component cannot be configured to
DMA data to unaligned addresses for receive packet operations from the
Triple Speed Ethernet component because of a potential data transfer
corruption that can occur. This patch addresses this issue by
utilizing the shift 16 bits feature of the Altera Triple Speed Ethernet
component and modifying the receive buffer physical addresses accordingly
such that the target receive DMA address is always aligned on a 32-bit
boundary.

Signed-off-by: Vince Bridgers <vbridgers2013@gmail.com>
Tested-by: Matthew Gerlach <mgerlach@altera.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/altera/altera_msgdma.c
drivers/net/ethernet/altera/altera_msgdma.h
drivers/net/ethernet/altera/altera_sgdma.c
drivers/net/ethernet/altera/altera_sgdma.h
drivers/net/ethernet/altera/altera_tse.h
drivers/net/ethernet/altera/altera_tse_main.c