projects / openwrt / staging / blogic.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 9211434) | patch
media: omap3isp: Correctly set IO_OUT_SEL and VP_CLK_POL for CCP2 mode
authorPavel Machek <pavel@ucw.cz>
Wed, 1 Mar 2017 11:45:46 +0000 (06:45 -0500)
committerMauro Carvalho Chehab <mchehab@s-opensource.com>
Sun, 20 Aug 2017 12:16:13 +0000 (08:16 -0400)
commit37a0c6f92cc5edcf47a705ab908d4f9657554396
tree46cef3b11102498f57bc5b848019db0c0a9157f1tree | snapshot
parent9211434bad302be53a2203db4341fabe29db9197commit | diff
media: omap3isp: Correctly set IO_OUT_SEL and VP_CLK_POL for CCP2 mode

ISP CSI1 module needs all the bits correctly set to work.

Signed-off-by: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com>
Signed-off-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Tested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> # on Beagleboard-xM + MPT9P031
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
drivers/media/platform/omap3isp/ispccp2.c diff | blob | history
drivers/media/platform/omap3isp/ispreg.h diff | blob | history
John Crispins staging tree