dra7xx: Enable USB_PHY3 32KHz clock
authorRoger Quadros <rogerq@ti.com>
Mon, 23 May 2016 14:37:49 +0000 (17:37 +0300)
committerTom Rini <trini@konsulko.com>
Fri, 3 Jun 2016 01:42:15 +0000 (21:42 -0400)
commit3599774eec9d06812c6124bcd0b34cebd7ec5e1c
tree475a278e6688afecece9a97d0d748f1c33d927b7
parent55efadde7edee407a14c7cbf418c82b30a94faa8
dra7xx: Enable USB_PHY3 32KHz clock

DRA7xx has a 32KHz PHY clock for USB_PHY3 that must be enabled
for USB1 instance in Super-Speed.

Signed-off-by: Roger Quadros <rogerq@ti.com>
arch/arm/cpu/armv7/omap5/hw_data.c
arch/arm/cpu/armv7/omap5/prcm-regs.c
arch/arm/include/asm/omap_common.h