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(parent: 267db66) | patch
drm/i915: Update rps frequencies for BXT
authorBob Paauwe <bob.j.paauwe@intel.com>
Thu, 25 Jun 2015 21:54:07 +0000 (14:54 -0700)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Fri, 26 Jun 2015 17:41:15 +0000 (19:41 +0200)
commit350405623ff3f447813eaef2035272bf05281671
tree68786b488fcaef15bf0df56765ac01482890cceftree | snapshot
parent267db663458a8077a087674fb85ea95f540d8671commit | diff
drm/i915: Update rps frequencies for BXT

Broxton is using a different register and different bit ordering
for rps status capabilities.

Also GT perf freqency register is different for Broxton so update
that.

Signed-off-by: Bob Paauwe <bob.j.paauwe@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_debugfs.c diff | blob | history
drivers/gpu/drm/i915/i915_reg.h diff | blob | history
drivers/gpu/drm/i915/intel_pm.c diff | blob | history
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