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(parent: 4927166) | patch
ARM: am33xx: Fix DDR init delay placement
authorRuss Dill <Russ.Dill@ti.com>
Thu, 21 Jul 2016 11:28:31 +0000 (04:28 -0700)
committerTom Rini <trini@konsulko.com>
Mon, 25 Jul 2016 16:00:06 +0000 (12:00 -0400)
commit3325b06556b78a2afdaaa781765b505f7d1f8ae4
treee4627e24ab3481ade5da8a719434f871ce1319e7tree | snapshot
parent492716662fbdc08e254dda2c209b320e2bf6c837commit | diff
ARM: am33xx: Fix DDR init delay placement

The delay needs to be before the write to ref_ctrl register
which initiates refreshes. An improper initialization sequence
generates an L3 noc error.

Signed-off-by: Russ Dill <Russ.Dill@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
arch/arm/cpu/armv7/am33xx/ddr.c diff | blob | history
Broadcom-s U-Boot