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coresight: tmc-etr: Allocate and free ETR memory buffers for CPU-wide scenarios
authorMathieu Poirier <mathieu.poirier@linaro.org>
Thu, 25 Apr 2019 19:53:07 +0000 (13:53 -0600)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 25 Apr 2019 20:00:18 +0000 (22:00 +0200)
commit3147da92a8a81fc304e6e9d7ac75b68d6a54d9f7
treec3f53f213dc64f3d959d14956a5273f6e4bb5e7etree | snapshot
parentc5ff734462b1d32f793db717ef222cd05e6232d5commit | diff
coresight: tmc-etr: Allocate and free ETR memory buffers for CPU-wide scenarios

This patch uses the PID of the process being traced to allocate and free
ETR memory buffers for CPU-wide scenarios.  The implementation is tailored
to handle both N:1 and 1:1 source/sink HW topologies.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Tested-by: Leo Yan <leo.yan@linaro.org>
Tested-by: Robert Walker <robert.walker@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/hwtracing/coresight/coresight-tmc-etr.c diff | blob | history
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