perf/x86: Enable free running PEBS for REGS_USER/INTR
authorAndi Kleen <ak@linux.intel.com>
Thu, 31 Aug 2017 21:46:30 +0000 (14:46 -0700)
committerIngo Molnar <mingo@kernel.org>
Sun, 17 Dec 2017 12:55:17 +0000 (13:55 +0100)
commit2fe1bc1f501d55e5925b4035bcd85781adc76c63
tree5c8d65bd583d098850e837ed489fc3827b272bb7
parentf2dbad36c55e5d3a91dccbde6e8cae345fe5632f
perf/x86: Enable free running PEBS for REGS_USER/INTR

[ Note, this is a Git cherry-pick of the following commit:

    a47ba4d77e12 ("perf/x86: Enable free running PEBS for REGS_USER/INTR")

  ... for easier x86 PTI code testing and back-porting. ]

Currently free running PEBS is disabled when user or interrupt
registers are requested. Most of the registers are actually
available in the PEBS record and can be supported.

So we just need to check for the supported registers and then
allow it: it is all except for the segment register.

For user registers this only works when the counter is limited
to ring 3 only, so this also needs to be checked.

Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/20170831214630.21892-1-andi@firstfloor.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
arch/x86/events/intel/core.c
arch/x86/events/perf_event.h