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(parent: a6cda9c) | patch
disable dsp freq use for vlynq bus clock init, disable external clocking (it locks...
authorNicolas Thill <nico@openwrt.org>
Tue, 11 Sep 2007 14:50:43 +0000 (14:50 +0000)
committerNicolas Thill <nico@openwrt.org>
Tue, 11 Sep 2007 14:50:43 +0000 (14:50 +0000)
commit2ef23a0fd9fc7a95fa12e2d22b0658c8443831c6
treea58b7b259504ee6524a2292c5793b5e61532960ctree | snapshot
parenta6cda9c4bc591b08e58ab8adf0c7b5a2a8ff1965commit | diff
disable dsp freq use for vlynq bus clock init, disable external clocking (it locks up on c54apra2+) and revert to internal clocking trying various clock divisors. cleanup: * remove volative and use readl & writel accessors instead * use set_irq_chip & friends for irq setup * use kzalloc instead of kmalloc * secure VINT_VECTOR macro argument * remove unused vlynq_local_id function

SVN-Revision: 8750
target/linux/ar7/files/arch/mips/ar7/vlynq.c diff | blob | history
target/linux/ar7/files/include/asm-mips/ar7/vlynq.h diff | blob | history
Staging tree of Jo-Philipp Wich