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(parent: 2858038) | patch
clk: tegra: Make sor_safe the parent of dpaux and dpaux1
authorThierry Reding <treding@nvidia.com>
Thu, 23 Jun 2016 10:52:30 +0000 (12:52 +0200)
committerThierry Reding <treding@nvidia.com>
Thu, 23 Jun 2016 15:46:33 +0000 (17:46 +0200)
commit2e34c2ac16ee6574743c73caa3d796e307f028a6
treeb9e52b5e1af7a7e4670bc2a40e4ffc7f0b49d89btree | snapshot
parent2858038696b9672ef50cd38904fec510bc814584commit | diff
clk: tegra: Make sor_safe the parent of dpaux and dpaux1

It turns out that sor_safe, rather than pll_p, is the parent of the
dpaux and dpaux1 clocks.

Acked-by: Jon Hunter <jonathanh@nvidia.com>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Rhyland Klein <rklein@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
drivers/clk/tegra/clk-tegra210.c diff | blob | history
John Crispins staging tree