system: add RISC-V CPU info
authorYu Chien Peter Lin <peterlin@andestech.com>
Thu, 15 Jun 2023 03:32:33 +0000 (11:32 +0800)
committerHauke Mehrtens <hauke@hauke-m.de>
Sun, 25 Jun 2023 17:30:10 +0000 (19:30 +0200)
commit2db836553e8fc318143b38dbc6e12b8625cf5c33
treec44ca6f73b38bb34bbad4a895ebb29a77ffe73d7
parent122a5e3b8455f88fef4e050a229c4625a9a7c6ec
system: add RISC-V CPU info

This patch adds the missing information about RISC-V architecture,
which has been supported by OpenWrt. Currently, LuCI shows "?" at the
field of Architecture, we add "RISC-V" with isa string parsed from
/proc/cpuinfo.

For example, the following platform generates "RISC-V (rv64imafdc)":

root@OpenWrt:/# cat /proc/cpuinfo
processor       : 0
hart            : 0
isa             : rv64imafdc
mmu             : sv48
mvendorid       : 0x31e
marchid         : 0x8000000000008a45
mimpid          : 0x820

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
system.c