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(parent: bb676df) | patch
drm/msm: higher values of pclk can exceed 32 bits when multiplied by a factor
authorAbhinav Kumar <abhinavk@codeaurora.org>
Thu, 7 Jun 2018 20:50:29 +0000 (13:50 -0700)
committerSean Paul <seanpaul@chromium.org>
Thu, 26 Jul 2018 14:40:15 +0000 (10:40 -0400)
commit2d0b10fc5111bb4a902e9be378496d04c401ab81
tree252ad33176f951e4297d60e8107ffc79e093ef96tree | snapshot
parentbb676df12b5e81cab57d1a212a6e9cfc343875a7commit | diff
drm/msm: higher values of pclk can exceed 32 bits when multiplied by a factor

Make the pclk_rate u64 to accommodate higher pixel clock
rates.

Changes in v3:
- Converted pclk_rate to u32 (Archit)
- Rebase on dsi cleanup set in msm-next

Cc: Sibi Sankar <sibis@codeaurora.org>
Cc: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
drivers/gpu/drm/msm/dsi/dsi_host.c diff | blob | history
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