clk: samsung: exynos5250: Sort definitions by registers and bitfield
authorTomasz Figa <t.figa@samsung.com>
Tue, 15 Oct 2013 17:41:15 +0000 (19:41 +0200)
committerTomasz Figa <t.figa@samsung.com>
Mon, 30 Dec 2013 17:15:46 +0000 (18:15 +0100)
commit2786c9622e9031ff03b6d54d8b5d2d28e9fd2579
tree0c14d223a6ffa38705e74d12a73f9bedebcda489
parent2bb00c68e094271b79deac993893461cc051b721
clk: samsung: exynos5250: Sort definitions by registers and bitfield

This patch reorders clock definitions, so they are sorted by register
addresses and bitfield shifts. When at it, blank lines are added to
separate definitions of clocks from different registers.

Overall this should make the driver more readable and reduce the number
of potential conflicts when adding new entries.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Tested-by: Tomasz Figa <t.figa@samsung.com>
drivers/clk/samsung/clk-exynos5250.c