clk: tegra: Make vic03 a child of pll_c3
authorThierry Reding <treding@nvidia.com>
Mon, 11 Jun 2018 08:18:53 +0000 (10:18 +0200)
committerStephen Boyd <sboyd@kernel.org>
Mon, 9 Jul 2018 00:03:59 +0000 (17:03 -0700)
commit26f8590c4a1f7bd30ef9b9d713388bd96eb43d16
tree4ad85c8ec1f234365eaa616101a300ef50c3a8af
parentce397d215ccd07b8ae3f71db689aedb85d56ab40
clk: tegra: Make vic03 a child of pll_c3

By default, the vic03 clock is a child of pll_m but that runs at 924 MHz
which is too fast for VIC. Make vic03 a child of pll_c3 by default so it
will run at a supported frequency.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/tegra/clk-tegra124.c