MIPS: Loongson-3: Adjust irq dispatch to speedup processing
authorHuacai Chen <chenhc@lemote.com>
Thu, 17 Mar 2016 12:41:07 +0000 (20:41 +0800)
committerRalf Baechle <ralf@linux-mips.org>
Fri, 13 May 2016 12:02:14 +0000 (14:02 +0200)
commit24653515e5d2cb07772919599ad799ce50f8af4f
tree096554215813e9e1630df8c3b79f3366f920ed70
parentd0514728247b91476a525a064f8b3c2f0c47bec4
MIPS: Loongson-3: Adjust irq dispatch to speedup processing

This patch adjust the logic in mach_irq_dispatch(), allow multiple IPs
handled in the same dispatching. This can speedup interrupt processing.

Signed-off-by: Huacai Chen <chenhc@lemote.com>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Cc: Steven J . Hill <sjhill@realitydiluted.com>
Cc: Fuxin Zhang <zhangfx@lemote.com>
Cc: Zhangjin Wu <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/12891/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/loongson64/loongson-3/irq.c