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(parent: a20a81e) | patch
Non-Secure Interrupt support during Standard SMC processing in TSP
authorSoby Mathew <soby.mathew@arm.com>
Fri, 9 May 2014 19:49:17 +0000 (20:49 +0100)
committerAndrew Thoelke <andrew.thoelke@arm.com>
Fri, 23 May 2014 07:46:21 +0000 (08:46 +0100)
commit239b04fa31647100c537852b4a3fc8bd47e33aa6
tree3b2c73b2d39ed0a460375b42f1f3143703646fbctree | snapshot
parenta20a81e5b4a19969673f672523b946647f5d545dcommit | diff
Non-Secure Interrupt support during Standard SMC processing in TSP

Implements support for Non Secure Interrupts preempting the
Standard SMC call in EL1. Whenever an IRQ is trapped in the
Secure world we securely handover to the Normal world
to process the interrupt. The normal world then issues
"resume" smc call to resume the previous interrupted SMC call.
Fixes ARM-software/tf-issues#105

Change-Id: I72b760617dee27438754cdfc9fe9bcf4cc024858
bl31/runtime_svc.c diff | blob | history
bl32/tsp/aarch64/tsp_entrypoint.S diff | blob | history
bl32/tsp/aarch64/tsp_exceptions.S diff | blob | history
bl32/tsp/tsp_interrupt.c diff | blob | history
bl32/tsp/tsp_main.c diff | blob | history
include/bl31/runtime_svc.h diff | blob | history
include/bl32/payloads/tsp.h diff | blob | history
services/spd/tspd/tspd_main.c diff | blob | history
services/spd/tspd/tspd_private.h diff | blob | history
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