i2c: designware: Round down ACPI provided clk to nearest supported clk
authorHans de Goede <hdegoede@redhat.com>
Tue, 29 Aug 2017 12:08:35 +0000 (14:08 +0200)
committerWolfram Sang <wsa@the-dreams.de>
Thu, 31 Aug 2017 18:27:39 +0000 (20:27 +0200)
commit231d069fcde22bd0582c2c9564f1b334d280c7d7
tree8f14e8489cf675c64a2f193ebaea0392b1e3d9c1
parentba201c4f5ebe13d7819081756378777d8153f23e
i2c: designware: Round down ACPI provided clk to nearest supported clk

The Lenovo Miix2 8 DSDT contains an i2c clk / bus speed of 1700000 Hz
for one if its devices, which is not supported.

This is the second DSDT to show up with an unsupported clk in a short
time, remove the hardcoded fix for DSDTs with a 1 MiHz clock and simply
always round down the clk to the nearest supported value.

Reported-by: russianneuromancer@ya.ru
Fixes: 682c6c2188 ("i2c: designware: Some broken DSTDs use 1MiHz ...")
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
drivers/i2c/busses/i2c-designware-platdrv.c