projects / openwrt / staging / blocktrron.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 577f3fd) | patch
ramips: mt7628: fix memory controller reset bit
authorReto Schneider <reto.schneider@husqvarnagroup.com>
Fri, 11 Jun 2021 09:19:51 +0000 (11:19 +0200)
committerHauke Mehrtens <hauke@hauke-m.de>
Sat, 6 Aug 2022 17:58:46 +0000 (19:58 +0200)
commit2293f1abe4d17c9ed9593f4e24fc73836f99dea5
tree06b7479d08efec27c97158260f28edb482cef3b3tree | snapshot
parent577f3fdbc92c91e252ee3b134637816a240d89f7commit | diff
ramips: mt7628: fix memory controller reset bit

According to MediaTek MT7688 Datasheet v1.4, as well as the MT7628
counterpart, the memory controller reset bit (MC_RST) is 10, not 20.
Reset bit 20 is used for for UART 2 (UART2_RST).

Please note: Due to the lack of hardware, I was not able to test this
change.

Signed-off-by: Reto Schneider <reto.schneider@husqvarnagroup.com>
target/linux/ramips/dts/mt7628an.dtsi diff | blob | history
Staging tree of David Bauer