ASoC: rsnd: SSI parent cares SWSP bit
authorKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Tue, 12 Jun 2018 05:52:17 +0000 (05:52 +0000)
committerMark Brown <broonie@kernel.org>
Mon, 18 Jun 2018 11:26:43 +0000 (12:26 +0100)
commit203cdf51f28820bee7893b4be392847418e6f4ec
tree2ecad8a3ec2b6fdd1ffd9af44a0dc521495cb1f4
parent7cc90a5cadb1733d95d3c2bc147cbcf7843aa585
ASoC: rsnd: SSI parent cares SWSP bit

SSICR has SWSP bit (= Serial WS Polarity) which decides WS pin 1st
channel polarity (low or hi). This bit shouldn't exchange after running.

Current SSI "parent" doesn't care SSICR, just controls clock only.
Because of this behavior, if platform uses SSI0 as playback,
SSI1 as capture, and if user starts capture -> playback order,
SSI0 SSICR::SWSP bit exchanged 0 -> 1 during captureing, and it makes
capture noise.
This patch cares SSICR on SSI parent, too.
Special thanks to Yokoyama-san

Reported-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Tested-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/sh/rcar/ssi.c