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(parent: 6a58870) | patch
clk: mediatek: Add dt-bindings for MT2701 clocks
authorShunli Wang <shunli.wang@mediatek.com>
Fri, 19 Aug 2016 05:34:51 +0000 (13:34 +0800)
committerStephen Boyd <sboyd@codeaurora.org>
Fri, 19 Aug 2016 19:18:41 +0000 (12:18 -0700)
commit1de9b21633d669668b089bc88a67c4cd74a89a1c
tree7dbc8031e01b3d6add8cd134e66038d66f16dafctree | snapshot
parent6a5887030a4a92cd27cfa1aee5be2a8c137975facommit | diff
clk: mediatek: Add dt-bindings for MT2701 clocks

Add MT2701 clock dt-bindings, include topckgen, apmixedsys,
infracfg, pericfg and subsystem clocks.

Signed-off-by: Shunli Wang <shunli.wang@mediatek.com>
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Signed-off-by: Erin Lo <erin.lo@mediatek.com>
Tested-by: John Crispin <blogic@openwrt.org>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
include/dt-bindings/clock/mt2701-clk.h [new file with mode: 0644] blob
John Crispins staging tree